From ThinCan
Jump to: navigation, search
ThinCan DBE61

The DBE61 marked a departure from the NSC Geode SC2200 platform previously used in other ThinCan models, this time being built around an AMD Geode LX700 with a CS5536 companion chip.


CPU AMD Geode LX700 @ 433MHz
Firmware ROM 256KB LPC NOR Flash
Mass Storage 64MB or 256MB NAND Flash or None
Memory Soldered 128MB or 256MB DDR SDRAM
Network Controller Realtek RTL8139
Video Resolution up to 1920x1440@85Hz
Audio AC97 v2.3 (ALC203)
Approximate Dimensions 150mm x 95mm x 32mm
Approximate Weight 280g (without Power Supply)
External Power Supply 9V to 16V DC
Power Consumption approximately 5W
Operating Temperature 5°C to 40°C


  • DBE61A: 256KB NOR Flash for BIOS, 128MB DDR SDRAM, 64MB NAND Flash for OS payload — used for SmartLink / Revnetek models and for Artec PXE boot models.
  • DBE61B: 256KB NOR Flash for BIOS, 256MB DDR SDRAM, 512MB NAND Flash for OS payload — used for preproduction Linutop-1 models.
  • DBE61C: 256KB NOR Flash for BIOS, 256MB DDR SDRAM, no NAND Flash — used for Linutop-1 models and for Artec Etherboot on Coreboot models.
  • DBE61D: 256KB NOR Flash for BIOS, 256MB DDR SDRAM, 64MB NAND Flash for OS payload — used as Artec product samples.

Driving the DBE61

  • The DBE61 is covered by GX/LX and CS5535 Linux kernel modules and by the "geode" X.org driver module.
  • The Realtek RTL8139 network controller is covered by Linux kernel modules 8139cp and 8139too.
  • If you need to swap phone out and master channels for the audio, the following kernel command line snippet would do that for built-in drivers:
snd-ac97-codec.ac97_quirk=swap_hp cs5535audio.ac97_quirk=1

Booting the DBE61

Artec engineers took the Geode GX port of Coreboot v2 and created an LX port from it. The Coreboot community later worked on top of that to keep up with the changes in Coreboot, eventually leading up to Coreboot v3.

  • Coreboot v3 includes a clean DBE61 port that was jointly developed by AMD, Artec and several other Coreboot contributors. Support in Coreboot-v3 is good, but extensive testing and stress testing is still to be conducted.


  • Coreboot can only chainload Etherboot from NOR or a Windows CE or GNU/Linux image from NAND on the DBE61; USB boot is not possible without highly experimental code.
  • gPXE cannot be built for Coreboot, because it is not a traditional BIOS; only a basic Etherboot client is possible. The community is working on porting gPXE to be usable with Coreboot.

12V output board

Artec has designed an GPIO output expansion board for ThinCan. The board connects to LPC header and the software can mux the LPC data pins to GPIO outputs to control the board. The board has 12V input and 4 NPN transistors to switch 4 outputs (negative terminal is swiched). The board is installed as one side panel of the box; it has 5 detachable 2-pole screw terminals.

FIXME: Next part: This must be reside somewhere in FAQ about Coreboot

Flash friendly "/dev/ones"

dd if=/dev/zero bs=1k count=<size_in_kilobytes> | tr '\0' '\377' > filename

See Also