FlexyICE

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Artec develops its own Programmable LPC ROM emulator FlexyICE FPGA code and related Python scripts as an Open Source project.

  • Instructions on how to use the FlexyICE to flash a Coreboot image onto the ThinCan™ can be found on each model's respective wiki page.
  • Instructions about using the FlexyICE on hardware other than the ThinCan™ can be found on the Coreboot homepage.

Contents

Bootstrapping a ThinCan

To bootstrap a non-booting ThinCan, you need a BIOS ROM emulator. The ThinCan has LPC bus header, where a secondary BIOS ROM can be connected. DBE61 has on-board parallel NOR rom and requires a "LPC memory"-type LPC ROM. DBE62 and DBE63 have "LPC FWH" type ROM on board and require another LPC FWH type LPC ROM.

The dongle is activated when connecting it (a pull-down line in LPC header is sensed by ThinCan; boot media selection is controlled by this line).

Usually the external ROM has EtherBoot BIOS image in it and the ThinCan continues loading the OS from TFTP server. A minimal linux image can be used to flash the actual BIOS to ThinCan on-board BIOS ROM (and possibly, the actual OS to on-board NAND flash; see below for details).

DBE60

  • Developing firmware for the DBE60 requires an Artec Programmable LPC Dongle with FPGA revision 01 or later.
  • A special cable is required to connect LPC dongle: LPC Dongle on DBE60.

DBE61

  • Developing firmware for the DBE61 requires an Artec Programmable LPC Dongle with FPGA revision 01 or later.
  • Starting with FPGA revision 04, a jumper must be placed on header J1 between pins 1 and 2 to disable the new LPC Firmware Hub Read feature.
  • When using dongle power from target (jumper JMP4 between pins 1 and 2), then Thincan must be reset manually after applying power, because dongle FPGA requires some time to load internal firmware from serial configuration flash.
  • Writing 256k BIOS image to dongle: ./dongle.py -c <dongle_port> <bios_image_file> 0x3C0000

DBE62

  • Developing firmware for the DBE62 requires an Artec Programmable LPC Dongle with FPGA revision 04 or later.
  • Writing 512k BIOS image to dongle: ./dongle.py -c <dongle_port> <bios_image_file> 0x380000

DBE63

  • Developing firmware for the DBE62 requires an Artec Programmable LPC Dongle with FPGA revision 04 or later.
  • Writing 1MB BIOS image to dongle: ./dongle.py -c <dongle_port> <bios_image_file> 0x300000

Booting a full Linux from FlexyICE 4MB partition

Artec FlexyICE has support for 4MB partition. On boot, the top 1MB is accessible; when writing 0xF4 to IO address 0x88 the whole 4MB is made accessible (this is already done in Coreboot, mainboard/artecgroup/dbe61/stage1.c). It is possible to fit a whole small linux kernel + filesystem + BIOS to the 4MB; FILO can be used to boot from memory-mapped dongle, for example:

CONFIG_AUTOBOOT_FILE="mem@0xFFE00000,0x1C0000 initrd=mem@0xFFC00000,0x200000 video=lxfb:1024x768"

This small linux can be used to flash the ThinCan BIOS ROM and/or NAND flash soldered on-board. The data can be acquired from USB media or downloaded from network.

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